64 x 5 AsyncFIFO w/Output Enable+Flags, 5.0V

The IDT72413 is a 64 x 5, high-speed First-In/First-Out (FIFO) that loadsand empties data on a first-in-first-out basis. It is expandable in bit width. All speedversions are cascad-able in depth. The FIFO has a Half-Full Flag, which signals when it has 32 or more wordsin memory. The Almost-Full/Empty Flag is active when there are 56 or morewords in memory or when there are 8 or less words in memory. This device is pin and functionally compatible to the MMI67413. It operatesat a shift rate of 45MHz. This makes it ideal for use in high-speed data bufferingapplications. This FIFO can be used as a rate buffer, between two digital systemsof varying data rates, in high-speed tape drivers, hard disk controllers, datacommunications controllers anD graphics controllers. The IDT72413 is fabricated using high-performance CMOS process. Thisprocess maintains the speed and high output drive capability of TTL circuits inlow-power CMOS.

• First-ln/First-Out Dual-Port memory—45MHz
• 64 x 5 organization
• Low-power consumption
  • Active: 200mW (typical)
• RAM-based internal structure allows for fast fall-through time
• Asynchronous and simultaneous read and write
• Expandable by bit width
• Cascadable by word depth
• Half-Full and Almost-Full/Empty status flags
• High-speed data communications applications
• Bidirectional and rate buffer applications
• High-performance CMOS technology
• Available in plastic DIP and SOIC
• Green parts available