25-Bit Configurable Registered Buffer for DDR2
25-Bit Configurable Registered Buffer for DDR2
Характеристики
| Бренд | Renesas Electronics |
|---|---|
| Длина | 13.5 |
| Minimum O | 1.7 V |
| Lead Finish | Tin/Silver/Copper |
| Supplier | CABGA |
| Bus Hold | Нет |
| Msl Level | 3 |
| Polarity | Non-Inverting |
| Max Proce | 260 |
| Propagati | 30 pF |
| Описание продукта | 13.5 x 5.5 x 1 mm |
| Maximum O | 1.9 V |
| Maximum P | 1.9@1.8V ns |
| Number Of | 25 |
| Screening Level | Commercial |
| Number Of | 25 |
| Ширина | 5.5 mm |
| Number Of | 25 |
| Logic Function | Registered Buffer |
| Typical O | 1.8 V |
| Number Of | 1 |
| Pitch | 0.8000 |
| Triggering Type | Positive-Edge/Negative-Edge |
| Maximum L | 8 mA |
| Output Si | Single-Ended |
| Рабочая температура | 0 to 70 °C |
| Input Sig | Single-Ended |
| Maximum H | -8 mA |
| Schedule B | 8542390000 |
| HTSN | 8542390001 |
| Number Of | 2 |
| Reset Type | Asynchronous |
| Maximum F | 410 MHz |
SKU: SSTUA32864BHLFT