2 Channel T1 / J1 / E1 Transceiver

The IDT82P2282 is a highly featured single device solution for T1/ E1/J1 trunks. Each link of the IDT82P2282 can be independently configured. The configuration is performed through an SPI or parallel microprocessor interface.

• Each link can be configured as T1, E1 or J1
• Supports T1/E1/J1 long haul/short haul line interface
• HPS for 1+1 protection without external relays
• Receive sensitivity exceeds -36 dB @ 772 Hz and -43 dB @ 1024 Hz
• Selectable internal line termination impedance: 100 ? (for T1), 75 ? / 120 ? (for E1) and 110 ? (for J1)
• Supports AMI/B8ZS (for T1/J1) and AMI/HDB3 (for E1) line encoding/decoding
• Provides T1/E1/J1 short haul pulse templates, long haul LBO (per ANSI T1.403 and FCC68: 0 dB, -7.5 dB, -15 dB, -22 dB) and userprogrammable arbitrary pulse template
• Supports G.772 non-intrusive monitoring
• Supports T1.102 line monitor
• Transmit line short-circuit detection and protection
• Each link can be configured as T1, E1 or J1
• Frame alignment/generation for T1 (per ITU-T G.704, TA-TSY- 000278, TR-TSY-000008), E1 (per ITU-T G.704), J1 (per JT G.704) and un-framed mode
• Supports T1/J1 Super Frame and Extended Super Frame, T1 Digital Multiplexer and Switch Line Carrier - 96, E1 CRC Multi-frame and Signaling Multi-frame
• Signaling extraction/insertion for CAS and RBS signaling
• Provides programmable system interface supporting MitelTM STbus, AT&TTM CHI and MVIP bus, 8.192 Mb/s multiplexed bus and 1.544 Mb/s or 2.048 Mb/s non-multiplexed bus.
• Supports Serial Peripheral Interface (SPI) microprocessor and parallel Intel/Motorola non-multiplexed microprocessor interface
• Global hardware and software reset
• One general purpose I/O pin