18-Bit Register

The FCT162823T 18-bit bus interface register is built using advanced, dual metal CMOS technology. These high-speed, low-power registers with clock enable (xCLKEN) and clear (xCLR) controls are ideal for parity bus interfacing in high-performance synchronous systems. The control inputs are organized to operate the device as two 9-bit registers or one 18-bit register. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT162823T has balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall times - reducing the need for external series terminating resistors.

• 0.5 MICRON CMOS Technology
• High-speed, low-power CMOS replacement for ABT functions
• Typical tSK(o) (Output Skew) < 250ps
• Low input and output leakage =1µA (max.)
• VCC = 5V ±10%
• Balanced Output Drivers of ±24mA
• Reduced system switching noise
• Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V, TA = 25°C
• Available in SSOP and TSSOP packages