1:6 LVDS Output 1.8V Fanout Buffer

The IDT8P34S1106I is a high-performance differential LVDS fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The IDT8P34S1106I is characterized to operate from a 1.8V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the IDT8P34S1106I ideal for those clock distribution applications demanding well-defined performance and repeatability. One differential input and six low skew outputs are available. The integrated bias voltage reference enables easy interfacing of single-ended signals to the differential device input. The device is optimized for low power consumption and low additive phase jitter.

• Six low skew, low additive jitter LVDS output pairs
• One differential clock input pair
• Differential CLK, nCLK pair can accept the following differential input levels: LVDS, CML
• Maximum input clock frequency: 1.2GHz (maximum)
• Output skew: 20ps (typical)
• Propagation delay: 290ps (typical)
• Low additive phase jitter, RMS; fREF = 156.25MHz, VPP = 1V, 12kHz- 20MHz: 39fs (typical)
• Full 1.8V supply voltage
• Lead-free (RoHS 6), 20-Lead VFQFN packaging
• -40°C to 85°C ambient operating temperature