1:4 LVDS Output 1.8V Fanout Buffer

The IDT8P34S1204I is a high-performance differential LVDS fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The IDT8P34S1204I is characterized to operate from a 1.8V power supply. Guaranteed low output-to-output and part-to-part skew characteristics make the IDT8P34S1204I ideal for those clock distribution applications demanding well-defined performance and repeatability. Two selectable differential inputs and four low skew outputs are available. The integrated bias voltage reference enables easy interfacing of single-ended signals to the device inputs. The device is optimized for low power consumption and low additive phase noise.

• Four low skew, low additive jitter LVDS output pairs
• Two selectable, differential clock input pairs
• Differential CLK, nCLK pairs can accept the following differential input levels: LVDS, CML
• Maximum input clock frequency: 1.2GHz
• LVCMOS/LVTTL interface levels for the control input select
• Output skew: 10ps (typical)
• Propagation delay: 400ps (maximum)
• Low additive phase jitter, RMS; fREF = 156.25MHz, 10kHz - 20MHz: 43fs (typical)
• Device current consumption (IDD): 78mA (maximum)
• Full 1.8V supply voltage
• lead-free (RoHS 6), 16-Lead VFQFN package
• -40°C to 85°C ambient operating temperature