SRAMs (asynchronous)

The IS61WV6416EEBLL is a high-speed, 1,048,576 bitstaticRAMsorganizedas65,536wordsby16 bits. It is fabricated using high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When CE\ is HIGH (deselected), the device assumes a standby mode at which the power dpation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE\ and OE\. The active LOW Write Enable (WE\) controls both writing and reading of the memory. A data byte allows Upper Byte (UB\) and Lower Byte (LB\) access. The IS61WV6416EEBLL is packaged in the JEDEC standard 44-pin TSOP-II, 48-pin Mini BGA (6mm x 8mm).

• High-speed access time: 8, 10 ns
• Low Active Power: 85 mW (typical)
• Low Standby Power: 7 mW (typical) CMOS standby
• Single power supply
• Fully static operation: no clocks or refresh required
• Three state outputs
• Data control for upper and lower bytes
• Commercial and Industrial temperature support
• Lead-free available
• Error Detection and Error Correction