Interface ICs

TC358840XBG, Ultra HD to CSI-2, bridge converts high resolution (higher than 4 Gbps) HDMI® stream to MIPI® CSI-2 Tx video. It is a follow up device of TC358743XBG. The HDMI-RX runs at 297 MHz to carry up to 7.2 Gbps video stream. It requires dual link MIPI CSI-2 Tx, 1 Gbps/data lane, to transmit out a maximum 7.2 Gbps video data.The bridge chip is necessary for current and next generation Application Processors which have been designed without video stream input port except CSI-2 Rx.

• HDMI-RX Interface
  • HDMI 1.4b
  • Video Formats Support (Up to 4K×2K / 30fps), maximum 24 bps (bit-per-pixel) no deep color support
  • RGB, YCbCr444: 24-bpp
  • YCbCr422: 24-bpp
  • Color Conversion
  • 4:2:2 to 4:4:4 is supported
  • 4:4:4: to 4:2:2 is supported
  • RGB888 to YCbCr (4:4:4 / 4:2:2) is supported
  • YCbCr (4:4:4 / 4:2:2) to RGB888/666 is supported
  • Maximum HDMI clock speed: 297 MHz
  • Audio Supports
  • Internal Audio PLL to track N/CTS value transmitted by the ACR packet
  • 3D Support
  • Support HDCP1.4 decryptions
  • First 128 byte (EDID 1.3 structure)
  • First E-EDID Extension: 128 bytes of CEAExtension version 3 (specified in CEA-861-D)
  • Embedded 1K-byte SRAM (EDID_SRAM)
  • Does not support Audio Return Path and HDMI Ethernet Channels
• CSI-2 TX Interface (This function is supported only by TC358840XBG )
  • MIPI CSI-2 compliant
  • Dual links CSI-2 (CSI0 and CSI1), each link supports 4 data lanes @ 1 Gbps/data lane
  • CSI0 carries the left half data of HDMI Rx video stream and CSI1 carries the right one at thedefault configuration
  • Left or right data can be assigned/programmed to either CSI-2 Tx link
  • The maximum length of each half is limited to 2048-pixel, CSI0 data length could be differentfrom that of CSI1"s
  • The maximum Hsync skew between CSI0 and CSI1 can be less than 10 ByteClk
  • Single link CSI-2, maximum horizontal pixel width
  • 2558 pixels (24-bit per pixel)
  • 3411 pixels (16-bit per pixel)
  • HDMI Info Frame data can be transmit over MIPI CSI-2 at the beginning of each frame (after FS short packet)
  • Supports video data formats
  • RGB666, RGB888, YCbCr444, YCbCr 422 24-bit and YCbCr 422 16-bit
  • YCbCr inputs can be converted into RGB before outputting and vice versa
• I²C Interface
  • Support for normal (100 kHz), fast mode (400 kHz) and ultrafast mode (2 MHz)
  • Slave Mode
  • To be used by an external Master to configure all TC358840XBG internal registers, including EDID_SRAM and panel control
  • Support 2 I²C Slave Addresses (0x0F and 0x1F) selected through boot-strap pin (INT)