Flash In-System Programmable Peripherals 52-Pin PQFP Tray

The PSD834F2 family of memory systems for microcontrollers (MCUs) brings In-System-Programmability (ISP) to Flash memory and programmable logic. The result is a simple and flexible solution for embedded designs. PSD devices combine many of the peripheral functions found in MCU based applications.

• FLASH IN-SYSTEM PROGRAMMABLE (ISP) PERIPHERAL FOR 8-BIT MCUS
• DUAL BANK FLASH MEMORIES
  • UP TO 2 Mbit OF PRIMARY FLASH MEMORY (8 Uniform Sectors, 32K x8)
  • UP TO 256 Kbit SECONDARY FLASH MEMORY (4 Uniform Sectors)
  • Concurrent operation: READ from one memory while erasing and writing the other
• UP TO 256 Kbit BATTERY-BACKED SRAM
• 27 RECONFIGURABLE I/O PORTS
• ENHANCED JTAG SERIAL PORT
• PLD WITH MACROCELLS
  • Over 3000 Gates of PLD: CPLD and DPLD
  • CPLD with 16 Output Macrocells (OMCs) and 24 Input Macrocells (IMCs)
  • DPLD - user defined internal chip select decoding
• 27 INDIVIDUALLY CONFIGURABLE I/O PORT PINS The can be used for the following functions:
  • MCU I/Os
  • PLD I/Os
  • Latched MCU address output
  • Special function I/Os.
  • 16 of the I/O ports may be configured as open-drain outputs.
• IN-SYSTEM PROGRAMMING (ISP) WITH JTAG
  • Built-in JTAG compliant serial port allows full-chip In-System Programmability
  • Efficient manufacturing allow easy product testing and programming
  • Use low cost FlashLINK cable with PC
• PAGE REGISTER
  • Internal page register that can be used to expand the microcontroller address space by a factor of 256
• PROGRAMMABLE POWER MANAGEMENT