Display Interface Bridge 72-Pin VFBGA

Parallel Port to MIPI® DSI (TC358768) is a bridge device that converts RGB to DSI. All internal registers can be access through I²C or SPI.

• DSI-TX Interface
  • MIPI® DSI compliant (Version 1.02.00-June 28, 2010)
  • Support DSI Video Mode data transfer
  • DCS Command for panel register access
  • Supports up to 1 Gbps per data lane
  • Supports1,2,3 or 4 data lanes
  • Supports video data formats
  • RGB888/666/565
• RGB Interface
  • Supports data formats
  • 24-bit data bus: RGB888/666/565 data formats
  • Up to 166 MHz input clock
  • Support VSYNC/HSYNC polarity option (default LOW)
  • Support DE polarity option (default High)
• I²C/SPI Slave Interface (Option to select either I²C or SPI interface)
  • I²C Interface (when Cs=L)
  • Support for normal (100KHz), fast mode (400 kHz) and Special mode (1 MHz)
  • Configure all TC358768 internal registers
  • Writing to DCS registers will trigger DCS Command transmits over DSI
  • SPI interface (when Cs =H)
  • SPI interface support for up to 25 MHz operation
  • Configure all TC358768 internal registers
  • Writing to DCS registers will trigger DCS Command transmits over DSI
• GPIO signals
  • 2 GPIO signals
  • Two GPIO signals can be configured as SPI signals (SPI_SS and SPI_MISO)
  • Or One GPIO signal can be configured as Interrupt output signal, INT
• System
  • Clock and power management support to achieve low power states
• Power supply inputs
  • Core and MIPI® D-PHY: 1.2V
  • I/O: 1.8V to 3.3V
• Typical Power Consumption
  • WXGA @60fps: Pixel Clk: 74.25 MHz, DSIClk: 312 MHz: 66.7 mW
  • 1080P @60fps: Pixel Clk: 148.5 MHz, DSIClk: 471 MHz: 91.4 mW
  • Power Down Condition is achieved by turning off clock sources: PClk and RefClk
• Package: P-VFBGA72