Counter/Divider Single 4-Bit Async Binary Down 16-Pin PDIP Rail
The MC14526B binary counter is constructed with MOS P-channel and N-channel enhancement mode devices in a monolithic structure. This device is presettable, cascadable, synchronous down counter with a decoded "0" state output for divide-by-N applications. In single stage applications the "0" output is applied to the Preset Enable input. The Cascade Feedback input allows cascade divide-by-N operation with no additional gates required. The Inhibit input allows disabling of the pulse counting function. Inhibit may also be used as a negative edge clock. This complementary MOS counter can be used in frequency synthesizers, phase-locked loops, and other frequency division applications requiring low power dissipation and/or high noise immunity.
- Supply Voltage Range = 3.0 Vdc to 18 Vdc
- Logic Edge-Clocked Design - Incremented on Positive Transition of Clock or Negative Transition of Inhibit
- Asynchronous Preset Enable
- Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range
- Pb-Free Packages are Available
Spezifikationen
| Brand | ON Semiconductor |
|---|---|
| Supplier | PDIP |
| Number Of | 1 |
| Lead Finish | Matte Tin |
| Product description | 19.55 x 6.85 x 3.43 mm |
| Parallel | Yes |
| Number Of | 4 |
| Direction Type | Uni-Directional |
| Operation Mode | Down Counter |
| Maximum Q | 0.02 mA |
| Propagati | 50 pF |
| Maximum O | 18 V |
| Max Proce | 260 |
| Operating temperature | -55 to 125 °C |
| Logic Function | Counter/Divider |
| Maximum P | 1100@5V|450@10V|320@15V ns |
| Minimum O | 3 V |
| Triggering Type | Positive-Edge/Negative-Edge |
| Number Of | 4 |
| Number Of | 4 |
| Typical O | 3.3|5|9|12|15 V |
| Terminal | Yes |
| Schedule B | 8542390000 |
| HTSN | 8542390001 |
| Country of origin | United States |
| Reset Type | Asynchronous |
| Type Prod | Binary |
| Preset Type | Asynchronous |
SKU: MC14526BCPG