商品原材料交易平台

Zero Delay PLL Clock Buffer Single 8-Pin TSSOP T/R

P3P623S00B/E is a versatile, 3.3V zero-dealy buffer designed to distribute Timing-Safe clocks with peak EMI reduction.P3P623S00B is an eight pin version, accepts one reference input and drives out one low skew Timing-Safe clock.P3P623S00E accepts one reference input and drives out eight low-skew Timing-Safeclocks.P3P623S0B/E has an SS% that selects two different deviation and associated Input-Output skew(Tskew).P3P623S00E has a CLKOUT for adjusting the Input-Output clock dealy, depending upon the value of capacitor connected at this pin to GND.P3P623S00B/E operates from a 3.3V supply and is available in two different packages.
  • Clock distribution with Timing-Safe Peak EMI Reduction
  • 2 different Spread Selection options
  • Spread Spectrum can be turned ON/OFF

规格参数

Brand ON Semiconductor
Product description 3.1 x 4.5 x 1.05 mm
Operating 3.3 V
Operating temperature 0 to 70 °C
Schedule B 8542390000
HTSN 8542390001
Supplier TSSOP
Max Proce 260
Maximum I 50 MHz
Msl Level 1
Lead Finish Matte Tin
Country of origin United States
Screening Level Commercial
Minimum I 20 MHz
Number Of 1
Type Prod Zero Delay PLL Clock Buffer
Output Fr 20, 50 MHz
SKU: P3P623S00BG-08TR