PLL Clock Buffer Single 28-Pin SSOP T/R

Pericom Semiconductor"s PI6C20400 is a high-speed, low-noise differential clock buffer designed to be companion to PI6C410B. The device distributes the differential SRC clock from PI6C410B to four differential pairs of clock outputs either with or without PLL. The clock outputs are controlled by input selection of SRC_STOP#, PWRDWN# and SMBus, SCLK and SDA. When input of either SRC_STOP# or PWRDWN# is low, the output clocks are Tristated. When PWRDWN# is low, the SDA and SCLK inputs must be Tri-stated.

• Four Pairs of Differential Clocks
• Low skew < 50ps
• Low jitter < 50ps
• Output Enable for all outputs
• Outputs tristate control via SMBus
• Power Management Control
• Programmable PLL Bandwidth
• PLL or Fanout operation
• 3.3V Operation
• Packaging (Pb-free and Green): 28-Pin SSOP (H28) & 28-Pin TSSOP (L28)