COREU1PHY-UTOPIA LEVEL 1 PHY INTERFACE
CoreU1PHY is a UTOPIA Level 1 PHY interface core that connects directly to any ATM link-layer (master) device and user logic (or optional ATM cell buffer blocks) to provide an interface between the link-layer device and a non-standard physical layer device.
- Standard 8-Bit, 25 MHz UTOPIA Level 1 PHY Interface Complies with the ATM Forum UTOPIA Specification, Level 1 Version 2.01 (af-phy- 0017.000)
- Separate TX and RX Clocks and Interface Pins
- Supports Cell-Level Handshake for 53- or 54-byte ATM Cells with Automatic Add/Drop of UDF2 Field in the ATM Header in 53-byte Mode
- 16-Bit (54-byte) User Interfaces Can be Used Directly or Bolt-Up to One of Actel"s ATM Cell Buffer Blocks: ATMBUFx
规格参数
| Brand | Microchip |
|---|---|
| Schedule B | 8542390000 |
| HTSN | 8542390001 |
| Country of origin | United States |
| Function | Utopia Level 1 PHY Interface |
| Supported | Fusion|ProASIC3/E|ProASICPLUS|Axcelerator |
| Product description | mm |
SKU: CoreU1PHY-AR